Electronic technology today relies almost exclusively on crystalline silicon with compound semiconductors, such as GaAs, occupying small, but important, niches in optoelectronic and high speed applications. Amorphous silicon device configurations have rapidly progressed in both their performance and stability since the first report in 1979 by LeComber et al (Electronic Letters 15, 179 [1979]) of an amorphous silicon field effect transistor. Amorphous silicon technology has emerged as a prime candidate for large area thin film applications, first in photovoltaic applications and later in large area integrated circuits used in flat liquid crystal displays, solid state imagers, electronic copiers, printers and scanners. This semiconductor material is ideally suited for large area arrays (in excess of 12 inches by 12 inches) because the low deposition temperatures involved in its glow discharge fabrication process, make possible the use of inexpensive substrate materials, such as glass.
By comparison to crystalline silicon devices, the main difference with amorphous silicon devices is the relatively low electron band mobility (.ltoreq.20 cm.sup.2 /Vs) of the latter coupled with a relatively large density of localized states. This results in amorphous silicon devices having a slower switching time than single crystalline devices. However, in many large area applications, such as printing, since numerous operations can be performed in parallel, the overall system speed is quite fast. Furthermore, since amorphous silicon has a wide effective energy gap, an extremely large photoconductivity and good light sensitivity, it is uniquely suited for optoelectronic applications, particularly in the visible range.
In U.S. Pat. No. 4,752,814 (Tuan) entitled "High Voltage Thin Film Transistor", assigned to the same assignee as the present application, there is taught a unique a-Si:H transistor device which may be operated at 500 volts, or more. In operation, several hundreds of volts can be switched by a low voltage gate signal. Fabrication of this high voltage transistor is compatible with low voltage amorphous silicon TFTs. The transistor structure of this earlier patent is shown in FIG. 1 and its initial I.sub.DS vs. V.sub.DS characteristics are shown in curve A of FIG. 7. This transistor will not be stable under its standard operating conditions and, after being stressed, its characteristics will shift, as indicated by curve B of FIG. 7. Electrostatic stressing will occur on the order of minutes, in response to a history of applied voltages. The illustrated shift to higher V.sub.DS values is undesirable because it could degrade the performance of the HVTFT in circuit applications. In order to describe this shift, the parameter V.sub.x has been defined. It is shown in FIG. 7 as the x-axis crossing of a tangent to the inflection point of the I.sub.DS vs. V.sub.DS curve.
Therefore, it is an object of the present invention to greatly reduce the V.sub.x shift, in order to enable a high voltage thin film transistor to have more uniform operating characteristics regardless of its electrostatic stress history.
It is another object of this invention to provide a high voltage thin film transistor with an improved V.sub.ON.